feat(pcb): add four M2 NPTH mounting holes at the corners

Browse Source

Insets uniformly 3.00 mm from each board edge. Hole pattern is
75.00 mm (X) x 54.00 mm (Y) center-to-centre on the 81 x 60 mm board.

Hole specs per location:
  MH1 (63, 43)   - top-left
  MH2 (138, 43)  - top-right
  MH3 (63, 97)   - bottom-left
  MH4 (138, 97)  - bottom-right
  drill 2.2 mm (M2 medium-fit clearance), copper keep-out 4.0 mm dia,
  NPTH, no solder-mask opening.

Constraint: M2 clearance hole, NPTH (no electrical connection)
Constraint: board outline gr_rect (60,40)-(141,100) -> 81 x 60 mm
Rejected: 2.5 mm inset | pad edge sits exactly on board edge clearance min
Rejected: solder-mask opening on the pad | ESP32 silk at y=96.36
  near MH3 produced two silk_over_copper warnings; bare drill (no mask
  opening) keeps DRC clean at the cost of less-visible holes
Rejected: putting holes outside Edge.Cuts as silkscreen markers |
  user asked for real mounting holes, not indicators
Confidence: high
Scope-risk: narrow
Directive: hole positions are coupled to the board outline -- if the
  outline changes, the 3.00 mm uniform inset must be recomputed

...

This commit is contained in:

0xWheatyz

2026-05-15 16:14:01 -04:00

parent cd115c8805

commit 24d76b1fff

3 changed files with 1115 additions and 696 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download Patch File Download Diff File Expand all files Collapse all files

firstpcb.kicad_pcb

+1100 -693

File diff suppressed because it is too large Load Diff