feat(pcb): move voltage regulator, caps, and pull-down resistors onto board

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Place U1, C1, C2, C3, R1, R2 in the left open area (x=73-86, y=48-60)
of the board outline. Add copper traces for +12V bus (U1 input to
existing +12V net via A4988), +5V bus (U1 output to ESP32 VIN and C2),
and limit switch signals (/LIM_A to SW1, /LIM_C to existing trace).
Remove orphaned net-0 segments and clear zone fills for regeneration.

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This commit is contained in:

0xWheatyz

2026-03-24 16:52:08 -04:00

parent b30f93e577

commit 7085e52780

1 changed files with 2728 additions and 2168 deletions

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firstpcb.kicad_pcb

+2728 -2168

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