0xWheatyz 7085e52780 feat(pcb): move voltage regulator, caps, and pull-down resistors onto board ...

Place U1, C1, C2, C3, R1, R2 in the left open area (x=73-86, y=48-60)
of the board outline. Add copper traces for +12V bus (U1 input to
existing +12V net via A4988), +5V bus (U1 output to ESP32 VIN and C2),
and limit switch signals (/LIM_A to SW1, /LIM_C to existing trace).
Remove orphaned net-0 segments and clear zone fills for regeneration.

2026-03-24 16:52:08 -04:00

firstpcb-backups

chore: rotate kicad backup archives

2026-03-24 16:18:53 -04:00

Library.pretty

fix(footprint): reposition pins 5.8mm from silkscreen bottom at Y=43

2026-03-24 15:27:43 -04:00

firstpcb-job.gbrjob

chore: init

2026-03-24 14:56:56 -04:00

firstpcb.kicad_pcb

feat(pcb): move voltage regulator, caps, and pull-down resistors onto board

2026-03-24 16:52:08 -04:00

firstpcb.kicad_prl

chore: init

2026-03-24 14:56:56 -04:00

firstpcb.kicad_pro

chore: init

2026-03-24 14:56:56 -04:00

firstpcb.kicad_sch

style(schematic): reposition text labels to eliminate overlaps

2026-03-24 16:26:32 -04:00

firstpcb.kicad_sch-bak

chore: init

2026-03-24 14:56:56 -04:00

firstpcb.step

chore: init

2026-03-24 14:56:56 -04:00

fp-info-cache

chore: update pcb layout and fp-info-cache from kicad

2026-03-24 16:18:43 -04:00

fp-lib-table

chore: init

2026-03-24 14:56:56 -04:00

S

Description

No description provided

7.3 MiB

Languages

Python 99.2%

Nix 0.8%