chore(outputs): regenerate STEP and PCBWay fabrication package

* firstpcb.step regenerated from current PCB (DRC-clean board with four M2 mounting holes). Two component 3D models (R_0805 and JST_XH_B4B-XH-A) fail to decompress under the Nix-packaged KiCad; affected components are missing 3D shapes but board body and other models are present. * pcbway_export/ contains gerbers (RS-274X Protel, 4.6 mm), separate PTH/NPTH Excellon drill files, drill maps, gbrjob, and a README with the stackup/spec. * firstpcb_pcbway.zip is the upload-ready archive for PCBWay. * .gitignore updated to drop KiCad autosaves and *.pre-drc-fix locals. Constraint: PCBWay accepts gerbers with Protel extensions and Excellon drills, separate PTH/NPTH preferred Directive: regenerate this package whenever the PCB changes -- the zip is a derived artifact; the source of truth is firstpcb.kicad_pcb
2026-05-15 16:39:27 -04:00
parent 24d76b1fff
commit d1ff44802b
18 changed files with 29638 additions and 2693 deletions
@@ -0,0 +1,127 @@
+{
+  "Header": {
+    "GenerationSoftware": {
+      "Vendor": "KiCad",
+      "Application": "Pcbnew",
+      "Version": "10.0.0"
+    },
+    "CreationDate": "2026-05-15T16:38:12-04:00"
+  },
+  "GeneralSpecs": {
+    "ProjectId": {
+      "Name": "firstpcb",
+      "GUID": "66697273-7470-4636-922e-6b696361645f",
+      "Revision": "rev?"
+    },
+    "Size": {
+      "X": 81.05,
+      "Y": 60.05
+    },
+    "LayerNumber": 2,
+    "BoardThickness": 1.6,
+    "Finish": "None"
+  },
+  "DesignRules": [
+    {
+      "Layers": "Outer",
+      "PadToPad": 0.2,
+      "PadToTrack": 0.2,
+      "TrackToTrack": 0.2,
+      "MinLineWidth": 0.2,
+      "TrackToRegion": 0.2,
+      "RegionToRegion": 0.2
+    }
+  ],
+  "FilesAttributes": [
+    {
+      "Path": "firstpcb-F_Cu.gtl",
+      "FileFunction": "Copper,L1,Top",
+      "FilePolarity": "Positive"
+    },
+    {
+      "Path": "firstpcb-B_Cu.gbl",
+      "FileFunction": "Copper,L2,Bot",
+      "FilePolarity": "Positive"
+    },
+    {
+      "Path": "firstpcb-F_Paste.gtp",
+      "FileFunction": "SolderPaste,Top",
+      "FilePolarity": "Positive"
+    },
+    {
+      "Path": "firstpcb-B_Paste.gbp",
+      "FileFunction": "SolderPaste,Bot",
+      "FilePolarity": "Positive"
+    },
+    {
+      "Path": "firstpcb-F_Silkscreen.gto",
+      "FileFunction": "Legend,Top",
+      "FilePolarity": "Positive"
+    },
+    {
+      "Path": "firstpcb-B_Silkscreen.gbo",
+      "FileFunction": "Legend,Bot",
+      "FilePolarity": "Positive"
+    },
+    {
+      "Path": "firstpcb-F_Mask.gts",
+      "FileFunction": "SolderMask,Top",
+      "FilePolarity": "Negative"
+    },
+    {
+      "Path": "firstpcb-B_Mask.gbs",
+      "FileFunction": "SolderMask,Bot",
+      "FilePolarity": "Negative"
+    },
+    {
+      "Path": "firstpcb-Edge_Cuts.gm1",
+      "FileFunction": "Profile",
+      "FilePolarity": "Positive"
+    }
+  ],
+  "MaterialStackup": [
+    {
+      "Type": "Legend",
+      "Name": "Top Silk Screen"
+    },
+    {
+      "Type": "SolderPaste",
+      "Name": "Top Solder Paste"
+    },
+    {
+      "Type": "SolderMask",
+      "Thickness": 0.01,
+      "Name": "Top Solder Mask"
+    },
+    {
+      "Type": "Copper",
+      "Thickness": 0.035,
+      "Name": "F.Cu"
+    },
+    {
+      "Type": "Dielectric",
+      "Thickness": 1.51,
+      "Material": "FR4",
+      "Name": "F.Cu/B.Cu",
+      "Notes": "Type: dielectric layer 1 (from F.Cu to B.Cu)"
+    },
+    {
+      "Type": "Copper",
+      "Thickness": 0.035,
+      "Name": "B.Cu"
+    },
+    {
+      "Type": "SolderMask",
+      "Thickness": 0.01,
+      "Name": "Bottom Solder Mask"
+    },
+    {
+      "Type": "SolderPaste",
+      "Name": "Bottom Solder Paste"
+    },
+    {
+      "Type": "Legend",
+      "Name": "Bottom Silk Screen"
+    }
+  ]
+}