Commit Graph

22 Commits

Author SHA1 Message Date
0xWheatyz afd63000b5 fix(schematic): correct power input connector and namespace RHL0020A footprint
Replace the 3-pos MaiXu MX126-5.0 terminal block footprint on the power
input connector with a 3-pos JST EH vertical header, matching the actual
battery harness. Namespace the RHL0020A footprint reference as
Project:RHL0020A so it resolves through the project-local Project.pretty
library rather than the previous unqualified bare name.

Constraint: RHL0020A footprint lives in the project-local library
Confidence: high
Scope-risk: narrow
2026-05-14 22:33:57 -04:00
0xWheatyz ebda03e2d1 chore: add gitignore and drop regenerated fp-info-cache
Ignore KiCad lock files, the regenerated fp-info-cache, Python bytecode,
and editor/tooling local state (.history, .omc). Delete the previously
tracked fp-info-cache since KiCad regenerates it from the active library
tables on demand.

Confidence: high
Scope-risk: narrow
2026-05-14 22:33:47 -04:00
0xWheatyz 780b3d41ab chore(libs): restore full kicad standard footprint and symbol libraries
Previously fp-lib-table only contained a project-local Library.pretty entry
and sym-lib-table only contained the TPS61088 symbol library, which made
the project unable to resolve standard KiCad footprints/symbols on this
machine. Repopulate both tables with the full KICAD10 standard library
set, and add a project-local "Project" footprint library so footprints
like RHL0020A can be referenced via the Project: prefix.

Constraint: KiCad 10 uses KICAD10_FOOTPRINT_DIR/KICAD10_SYMBOL_DIR env vars
Confidence: high
Scope-risk: narrow
2026-05-14 22:32:11 -04:00
0xWheatyz e63c871611 feat(schematic): add boost converter support circuitry for U2 TPS61088QRHLRQ1
Add complete 5V-to-12V boost converter reference design around U2
(TPS61088QRHLRQ1) matching U1's circuit: input caps, compensation
network, soft-start cap, inductor, bootstrap cap, output caps, and
feedback voltage divider. Fix SW/BOOT pin types from power_in to
passive to resolve ERC errors. Update sym-lib-table to point to the
Q1 variant symbol library.

Constraint: Pin types must match U1's passive designation for SW/BST
Rejected: Leaving SW/BOOT as power_in | causes ERC "not driven" errors
Confidence: medium
Scope-risk: moderate
Not-tested: full ERC pass with both U1 and U2 present
2026-04-22 21:25:06 -04:00
0xWheatyz b0f7a660c7 feat(schematic): assign SMD footprints to all passive components
Replace THT resistor footprints with 0805 SMD, assign 0805 caps for
small values, 1206 for 22uF bulk caps, SMD electrolytic for C3, Bourns
SRR1260 for L1, and QFN-20 for U1 TPS61088.
2026-04-20 19:20:22 -04:00
0xWheatyz e9917837a8 feat(schematic): replace L7805 with TPS61088 boost converter
Remove the L7805 linear regulator (12V→5V) and its input/output caps,
replacing it with a TPS61088 boost converter circuit (5V→12V) for the
A4988 stepper driver. The ESP32 is now powered directly from the 5V
input rail. Includes integration script and project sym-lib-table for
the custom TPS61088 symbol library.
2026-04-20 17:49:23 -04:00
0xWheatyz c86a05dd2e refactor(schematic): redesign TPS61088 boost converter layout for clarity
Reorganize component placement with clean left-to-right power flow,
segmented rail wires for proper ERC connections, correct KiCad Device:C
pin positions (±3.81mm), and FB label instead of long crossing wire.
0 ERC errors.
2026-04-20 16:41:00 -04:00
0xWheatyz e3873251b3 feat(schematic): add TPS61088 5V-to-12V boost converter reference schematic
Python generator script produces a KiCad 9 schematic for the TPS61088
boost converter circuit (5V input, 12V/2A output) with feedback divider,
compensation network, bootstrap cap, and input/output filtering.
Includes a nix flake for the build environment.
2026-04-20 13:15:28 -04:00
0xWheatyz 9f00fe4a9b new pcb layout including several componets 2026-03-29 15:58:10 -04:00
0xWheatyz 8f88b61861 feat(pcb): place new components and route traces for voltage regulator circuit
Extend board outline downward by 15mm to accommodate 6 new components:
U1 (L7805 voltage regulator), C1/C2/C3 (decoupling caps), R1/R2 (pull-down
resistors). Move bottom mounting holes to match new outline. Delete
incorrectly-routed traces for DIR, STEP, LIM_C and unconnected nets, then
re-route them correctly to ESP32 bottom-row pins. Add +5V and +12V power
traces on B.Cu with via for layer transition. Route MOTOR_CTRL on B.Cu to
avoid F.Cu conflicts.
2026-03-24 17:34:52 -04:00
0xWheatyz 7fc83295b6 Revert "feat(pcb): move voltage regulator, caps, and pull-down resistors onto board"
This reverts commit 7085e52780.
2026-03-24 16:56:19 -04:00
0xWheatyz 7085e52780 feat(pcb): move voltage regulator, caps, and pull-down resistors onto board
Place U1, C1, C2, C3, R1, R2 in the left open area (x=73-86, y=48-60)
of the board outline. Add copper traces for +12V bus (U1 input to
existing +12V net via A4988), +5V bus (U1 output to ESP32 VIN and C2),
and limit switch signals (/LIM_A to SW1, /LIM_C to existing trace).
Remove orphaned net-0 segments and clear zone fills for regeneration.
2026-03-24 16:52:08 -04:00
0xWheatyz b30f93e577 style(schematic): reposition text labels to eliminate overlaps
- Move regulator section labels (U1, C1, C2) to non-overlapping positions
- Hide redundant A4988 value text and R1/R2 GND value text
- Shift +3.3V, +12V, and GND power labels for better spacing
- Move C3, R1, R2 reference/value text away from nearby labels
2026-03-24 16:26:32 -04:00
0xWheatyz 6959f32b5d chore: rotate kicad backup archives 2026-03-24 16:18:53 -04:00
0xWheatyz 1230d2f041 chore: update pcb layout and fp-info-cache from kicad 2026-03-24 16:18:43 -04:00
0xWheatyz b49004bb47 fix(schematic): add voltage regulator, pull-downs, decoupling cap, and enable control
- Add LM7805 (TO-220) with input/output caps to step 12V→5V for ESP32 VIN
- Add 10K pull-down resistors on D5/LIM_A and D4/LIM_C limit switch GPIOs
- Add 100uF electrolytic decoupling capacitor on A4988 VMOT
- Rewire A4988 ~ENABLE from GND to ESP32 D18 via MOTOR_EN net label
2026-03-24 16:16:01 -04:00
0xWheatyz 76b9eb3f46 refactor(schematic): replace long wires with local power symbols and net labels
Remove all 60 point-to-point wires and 11 junctions. Replace with:
- 13 local power symbols (+3.3V, +12V, GND) at each power pin
- 10 net labels (STEP, DIR, LIM_A, LIM_C, MOTOR_CTRL) for signals
- 37 short stub wires connecting pins to labels/power symbols
- 4 direct wires for A4988 motor outputs to stepper connector

Electrical connectivity is preserved. No component positions changed.
2026-03-24 15:51:13 -04:00
0xWheatyz 83b7903f60 fix(footprint): reposition pins 5.8mm from silkscreen bottom at Y=43
Shift all 30 pins uniformly by +5.765mm to place bottom pins at
Y=37.2, exactly 5.8mm from the silkscreen bottom line. Adjust
silkscreen, fab, and courtyard bottom edges to Y=43/43.1. Pins
maintain their relative 2.54mm spacing.
2026-03-24 15:27:43 -04:00
0xWheatyz a0d6c6bed4 fix(footprint): extend ESP32 outline to 51mm total board length
Stretch bottom boundary from Y=37.235 to Y=43.92 so the footprint
spans 51mm from antenna top to USB-C end. Update silkscreen,
courtyard, and fab outlines accordingly. Also fix broken right-side
silkscreen line endpoint.
2026-03-24 15:21:45 -04:00
0xWheatyz 3b87d26d7b chore: remove stale kicad lock file 2026-03-24 15:03:38 -04:00
0xWheatyz a3336575a4 fix(footprint): align ESP32 pins to 25.4mm spacing and 5.8mm boundary offset
Move pin columns from 22.86mm to 25.4mm X spacing. Shift all pins
up by 4.125mm so bottom pins sit 5.8mm from the footprint bottom
boundary. Update silkscreen, courtyard, and fab outlines to match.
2026-03-24 15:03:31 -04:00
0xWheatyz 3dc5f4d41d chore: init 2026-03-24 14:56:56 -04:00